Justin M Heinecke - CV
P.O. Box 3231      Chapel Hill NC 27515-3231    (919) 967-5640 or (919) 636-1647
email: heinecke "at" cs.unc.edu or projectpolish "at" earthlink.net
This document available in MSWord .doc format here or .txt format here.

QUALIFICATIONS

• i²s digital audio; i²c control
• BT.656 digital video;SMPTE ancillary timecode and audio data
• Magic/Oasis CMOS layout and simulation tools
• Synergy/Verilog/Synopsys/Synplicity/Xilinx ISE/MaxPlus+II for full system design and verification, and design for testability
• Gate Array ASIC & FPGA designs targetting multiple vendors
• Altera, Actel design systems; Viewlogic schematic entry
• Multiprocessor/multiboard implementations of VLIW and RISC architectures
• UNIX and Win95/WinNT/Win2000/WinXP familiarity
• Code Composer Studio for TI DSP's; Visual Studio C++ for x86
• C, PASCAL, FORTRAN, COBOL, various assembly languages; also csh, awk, sed, some perl
  

EXPERIENCE
Self-employed 9/98-current

Viewcast, Inc, Osprey Technologies 9/99-current (intermittent)
Research Triangle Park, NC
Consultant - Hardware Engineer
Doing business as Project Polish

Sole responsibility for all FPGA (Xilinx Spartan 3) code for a DSP based (TI TMS320DM642) SDI/HD-SDI video transceiver PCIex card, including system architecture, synthesis, simulation and verification, and static timing analysis, as well as hardware bringup and verification.  This firmware included a full 8-stereo channel audio embedder/de-embedder at full HD frame rates.  Developed a Windows based i²c control suite gui for full system verification.   Work included two generations of unreleased PCI and PCIex products.  This product, the Viewcast Osprey 700e HD, is the recipient of the 2007 STAR Award from TV Technology Europe and the 2008 Streaming Media Readers’ Choice Award in the encoding hardware category.

Worked with a team to complete an FPGA (Altera) based audio and video capture PCI card, concentrating primarily on Verilog synthesis and simulation, and taking on full responsibility for embedded firmware and FPGA code for an IEEE-1394 digital video daughterboard (Altera, Philips P89C51, Divio NW701).  Also included some architectural design work, plus a great deal of surface mount prototyping. This product, the Viewcast/Osprey Technologies Osprey-500, captures analog (NTSC & PAL, composite & S-video), SDI, and IEEE-1394 digital video, as well as analog, consumer & professional digital audio, and embedded SDI audio, at full frame rates.

Self-employed (Division, Inc.) 2/95-5/96; Hewlett-Packard Co. 5/96-2/98
Chapel Hill, NC
VLSI Design Engineer

Brought a rough schematic outline into Verilog; through system verification and logic synthesis with Cadence Synergy; compiled into standard cells with Oasis; and laid out the chip with Magic. This three million transistor design, a mixture of standard cell and full custom and running at 100MHz, is the Geometry Network Interface for the Pixel Flow graphics machine started at the University of North Carolina at Chapel Hill and developed by Hewlett-Packard. (The Magic and Oasis toolsets are widely used in academic settings but are not often seen in industry.)

In May 1996, HP purchased Division; in February 1998, HP permanently closed the Chapel Hill Graphics Lab.

Sun Microsystems, Inc. 10/87-10/94
Research Triangle Park, NC
Member of Technical Staff - Hardware Engineer

Brought a rough hierarchical Verilog design through full system verification, managed the logic synthesis with Synopsys through multiple iterations to achieve design timing requirements, and moved the design and the Verilog test vectors into the vendor's toolsets (TI) and to tapeout. This ~30000 cell ASIC, a major part of the SUNAtm product (an ATM store-and-forward device, 1st place winner for Best New Product at Comdex), took a two person team just two months from rough design to tapeout, and has not required a respin.

Laid out the basic architecture, floor plan, and pinout of a ~72000 cell ASIC, established the Synopsys hierarchical synthesis methods to achieve conflicting gate count and timing requirements, and moved the design into the vendor's toolset (LSI). This ASIC is a major part of the SUNVideo product (a realtime MPEG video encoder board, 2nd place winner for Best New Product in CG&A's Industry Excellence Awards, 1993.)

Designed the system controller FPGA (Actel) for a 4-processor graphics accelerator incorporating the Intel i860 RISC processor, established the diagnostics strategy including directing the diagnostics efforts of two other engineers, and transferred the design from engineering to manufacturing and through to First Customer Ship as the MVX, part of the VX/MVX, a graphics/applications accelerator system.

Implemented all diagnostics for a 2 board VLIW bit-slice graphics accelerator based on the AMD 2910 sequencer, and played a key role in subsequent debugging of this highly acclaimed product, the TAAC-1, a graphics/applications accelerator system.

In Octover 1994, Sun closed the North Carolina Design Center.

Adage, Inc. 4/86-5/87
Raleigh, NC
Software Engineer

Developed software to connect Micro-VAX hardware to a custom 5080 emulator, working with DEC engineers to develop a custom driver, and wrote all the system messaging software.

Adage terminated the 5080 project in summer 1997, and closed the North Carolina site in early 1988.

University of North Carolina 9/83-9/85
Chapel Hill, NC
Graduate Assistant

Designed and had constructed a floating point accelerator for the Pixel-Planes 4 project at the Micro Systems Laboratory, using the AMD 2910 for the processing pipeline, and developed its assembler, simulator, and netlister.

In May 1985 I received my Master of Science  in Computer Science and left the university.

Applied Dynamics International 11/80-5/82
Ann Arbor, MI
Software Engineer

Took over development of the prom-based operating system for an NTSC raster graphics system based on the TMS-9900 processor, developing an overlay mechanism to extend the effective prom capacity, and developed extension firmware for an AMD 2910-based graphics accelerator and a full color RGB frame buffer.

In May 1982 ADI closed the raster graphics division.

EARLY WORK, various locations

Ann Arbor Computer 11/79-5/80
Ann Arbor, MI
Software Services, Inc. 3/79-6/79
Ann Arbor, MI
Government of Porter County 11/77-11/78
Valparaiso, IN
Software Engineer

Developed software in support of an automated warehouse system, including a serial device driver (assembly, Fortran); developed software in support of a real-time production monitoring system for Ford Motor Company (assembly, Fortran); developed the voter's registration database system for Porter County (COBOL); revamped tax assessment software for Porter County Tax Assessor's Office (RPG).

Education

• BA Physics and Mathematics (Valparaiso University) 5/77
• BS Electrical Engineering (Valparaiso University) 5/77
• MS Computer Science (University of North Carolina - Chapel Hill) 5/85

Technical Skills and other Qualifications

• Amateur Radio Advanced Class Operator - KD4CPM
• Member, Tau Beta Pi (EE Honor Society), Sigma Pi Sigma (Physics Honor Society)

Other Accomplishments

Three and a half solo coast to coast bicycle tours (6-8/76, 6-9/80, 6-10/87, 6-8/99)